5.1.1.1.2. Functional Requirements
Each pin needs to be configured individually to operate in input, output, alternate function, or analog mode. |
System must ensure the clock enable process is completed before proceeding with any GPIO configuration. |
The system shall provide functionality to enable the clock for a specific GPIO port by setting the corresponding bit in the RCC-›AHB1ENR register. |
The system must allow the user to configure each pin as either an input or output. |
System must support enabling clocks for all available GPIO ports. |
The system shall allow each GPIO pin to be configured in one of four modes by updating the MODER register. |
The system shall allow the user to read the current state (HIGH or LOW) of any pin, regardless of whether it is configured as an input or output. |
The system must support the use of internal pull-up and pull-down resistors for input pins to stabilize the input signals. |
The system shall provide functionality to disable GPIO pins, effectively turning them off when not in use to save power. |
The system shall allow the user to configure the output speed (low, medium, high) for each GPIO pin configured as an output. |
GPIO pins must trigger interrupts based on developer-defined conditions: rising, falling edge. |
GPIO pins must support configurable output speed via the OSPEEDR register. |