5.1.4.1.1. Informational Requirements

Requirement: GPIO Registers REQ_INT3_17310286668 ../../../../../_images/arrow-right-circle.svg
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category: Informational
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GPIO consists of the following registers: GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, GPIOx_PUPDR, GPIOx_IDR, GPIOx_ODR, GPIOx_BSRR, GPIOx_LCKR, GPIOx_AFRL, and GPIOx_AFRH.

Requirement: GPIOx_MODER REQ_INT3_17310286990 ../../../../../_images/arrow-right-circle.svg
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GPIOx_MODER configures the mode of each pin on one of the possible modes for GPIO.

Requirement: GPIOx_OTYPER REQ_INT3_17310286991 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Low

GPIOx_OTYPER register determines the output type (Push-Pull or Open-Drain).

Requirement: GPIOx_OSPEEDR REQ_INT3_17310286992 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Low

GPIOx_OSPEEDR register sets the speed of GPIO pins (Low, Medium, High, Very High).

Requirement: GPIOx_PUPDR REQ_INT3_173102869924111 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
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GPIOx_PUPDR register configures pull-up or pull-down resistors.

Requirement: GPIOx_IDR REQ_INT3_17310286993 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Low

GPIOx_IDR register reads the current state of input pins.

Requirement: GPIOx_ODR REQ_INT3_17310286994 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Low

GPIOx_ODR register writes the output state of GPIO pins.

Requirement: GPIOx_BSRR REQ_INT3_17310286995 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Low

GPIOx_BSRR is a register which allows the application to set and reset each individual bit in the output data register.

Requirement: GPIOx_AFRL/AFRH REQ_INT3_17310286997 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Low

GPIOx_AFRL and GPIOx_AFRH register selects alternate functions for GPIO pins.

Requirement: GPIO Pin Count REQ_INT3_173102866136 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

Each GPIO port can manage up to 16 pins.

Requirement: GPIO Locking Mechanism REQ_INT3_1731028666 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO locking mechanism freezes configurations to avoid unintended changes.

Requirement: GPIO Debouncing REQ_INT3_1731028665 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

Debouncing removes noise from mechanical switches or unstable inputs on GPIO pins.

Requirement: GPIO Edge Detection REQ_INT3_1731028663 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO pins can detect rising, falling, or both edges for interrupt generation.

Requirement: GPIO Operating Modes REQ_INT3_1731028662 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO has following operating modes : Input Mode, Output Mode,Analog Mode and Alternate Function mode.

Requirement: GPIO Input Mode REQ_INT3_1731028667 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO input mode is used to read external signals, such as those from buttons or sensors.

Requirement: GPIO Output Mode REQ_INT3_17310286685888 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO output mode is used to drive external devices, such as LEDs or motors.

Requirement: GPIO Analog Mode REQ_INT3_173102866956 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO analog mode is used to process analog signals directly, bypassing the digital circuitry.

Requirement: Communication Protocols REQ_INT3_1731028670119 ../../../../../_images/arrow-right-circle.svg
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category: Informational
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Communication Protocols used by GPIO pins for peripherals communication are UART,SPI and I2C.

Requirement: GPIO Alternate Function Mode REQ_INT3_1731028670987 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO alternate function mode enables communication with peripherals.

Requirement: GPIO Safety Features REQ_INT3_1731028663457 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO safety features include handling unused pins, interrupt handling, and configuration retention in low-power modes.

Requirement: Unused Pins Configuration REQ_INT3_1731028664778 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
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Unused GPIO pins should be configured as inputs with pull-down resistors to prevent floating states and erratic behavior.

Requirement: Interrupt Handling REQ_INT3_1731028665447 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
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GPIO pins can generate interrupts to enable event-driven programming and ensure timely responses to state changes.

Requirement: Low-Power Configuration Retention REQ_INT3_1731028666111 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO configurations must be retained in low-power modes, minimizing re-initialization and ensuring consistent operation.

Requirement: Alternate Function Range REQ_INT3_1731028667787 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

Each GPIO pin supports up to 16 alternate functions, ranging from AF0 to AF15.

Requirement: GPIO Bitwise Handling REQ_INT3_1731028675522 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

The GPIOx_BSRR register allows setting or resetting individual bits of the GPIOx_ODR register in a single operation, ensuring efficient and safe bit-level modifications.

Requirement: Oscillators REQ_INT3_1731028668125 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

The available oscillators for the STM32F411 microcontroller are the Low-Speed External (LSE) oscillator and the High-Speed External (HSE) oscillator.

Requirement: GPIO Oscillator Pins REQ_INT3_1731028666324 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
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GPIO pins associated with oscillator functionality are: PC14 and PC15: Low-Speed External (LSE) oscillator, PH0 andPH1: High-Speed External (HSE) oscillator.

Requirement: GPIO and Interrupt Handling REQ_INT3_17310286677 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

External interrupts can be configured for GPIO pins via the EXTI (External Interrupt) controller.

Requirement: GPIO Resistor Configuration REQ_INT3_1731028671147 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

Pull-up or pull-down resistors can be configured using the GPIOx_PUPDR register to stabilize signal levels and prevent floating states.

Requirement: Output Mode Configuration REQ_INT3_1731028671 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO pins can be set to output mode via the GPIOx_MODER register to drive external components like LEDs or motors.

Requirement: Peripherals REQ_INT3_1731028672478 ../../../../../_images/arrow-right-circle.svg
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category: Informational
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The available peripherals include Analog-to-Digital Converter (ADC), Digital-to-Analog Converter (DAC), Timers, Universal Asynchronous Receiver-Transmitter (UART), Serial Peripheral Interface (SPI), Inter-Integrated Circuit (I2C), and External Oscillators.

Requirement: Analog Mode Configuration REQ_INT3_1731028672 ../../../../../_images/arrow-right-circle.svg
status: Draft
style: red_bar
category: Informational
priority: Medium

Analog mode enables GPIO pins to interface with ADC and DAC peripherals by disabling the digital logic on the pin.

Requirement: Push-Pull Output Configuration REQ_INT3_1731028674 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

Push-pull configuration enables GPIO pins to actively drive both high and low states.

Requirement: Open-Drain Output Configuration REQ_INT3_1731028675 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

Open-drain configuration allows GPIO pins to pull the signal low while relying on an external pull-up resistor for the high state.

Requirement: GPIO pins Speed REQ_INT3_173102867747888 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO pins support two main speed Low speed which minimizes power consumption and noise, and Very High speed, which ensures the fastest transitions for high-performance applications.

Requirement: Detecting GPIO Pin State (HIGH/LOW) REQ_INT3_1731028677 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

The current state of a GPIO pin is captured in the GPIOx_IDR register, which reflects the voltage level at the pin.

Requirement: Edge-Triggered Interrupts REQ_INT3_1731028680 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO pins can generate interrupts on Rising, Falling, or Both edges, configured via the EXTI registers.

Requirement: Real-Time Monitoring REQ_INT3_1731028683 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

Real-time monitoring involves periodically polling the GPIOx_IDR register to detect state changes.

Requirement: Timestamping Events REQ_INT3_1731028684 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO interrupts can be timestamped to log when specific events occur, aiding in debugging and performance analysis.

Requirement: Debouncing Signals REQ_INT3_1731028685 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

Signal debouncing filters out noise or fluctuations caused by mechanical switches or unstable inputs.

Requirement: Safe Configuration of Unused Pins REQ_INT3_1731028686 ../../../../../_images/arrow-right-circle.svg
status: Draft
style: red_bar
category: Informational
priority: Medium

Unused GPIO pins are typically configured as inputs with pull-down resistors to avoid floating states.

Requirement: Event Notifications for State Changes REQ_INT3_1731028689 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO pins can notify the application of state changes via interrupts or status flags.

Requirement: Error Detection for GPIO Configuration REQ_INT3_1731028690 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

Errors in GPIO configuration, such as invalid register values, can be logged for debugging.

Requirement: Low Power Retention REQ_INT3_1731028691 ../../../../../_images/arrow-right-circle.svg
status: Draft
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category: Informational
priority: Medium

GPIO pins retain their configuration and state in low-power modes, ensuring system stability during power-saving operations.

Requirement: Real-Time ADC Readings REQ_INT3_1731028693 ../../../../../_images/arrow-right-circle.svg
status: Draft
style: red_bar
category: Informational
priority: Medium

ADC data from analog GPIO pins can be read continuously for real-time applications and requires setting the pins to analog mode and enabling the ADC module for data conversion.