4.1.3. Lessons by Emina Mešić

Contents:

• 4.1.3.1. V-Model Overview
  • 4.1.3.1.1. Introduction
  • 4.1.3.1.2. Phases of the V-Model
  • 4.1.3.1.3. Advantages of the V-Model:
  • 4.1.3.1.4. Disadvantages of the V-Model:
  • 4.1.3.1.5. Conclusion
• 4.1.3.2. STM32F411 Overview
  • 4.1.3.2.1. Introduction
  • 4.1.3.2.2. Core Features
  • 4.1.3.2.3. Clock and Power Management
  • 4.1.3.2.4. Peripheral Interfaces
  • 4.1.3.2.5. Timers and PWM Capabilities
  • 4.1.3.2.6. Debugging and Development Support
  • 4.1.3.2.7. Applications
  • 4.1.3.2.8. Conclusion
• 4.1.3.3. GPIO Overview
  • 4.1.3.3.1. GPIO Configuration
  • 4.1.3.3.2. GPIO Data Registers
  • 4.1.3.3.3. ODR vs. BSRR Registers
  • 4.1.3.3.4. Example Scenarios
• 4.1.3.4. Clock Initialization Overview
  • 4.1.3.4.1. Key Concepts of Clock Initialization
  • 4.1.3.4.2. Configuring the PLL for 100 MHz from 25 MHz Input
  • 4.1.3.4.3. Steps for Configuration
  • 4.1.3.4.4. Register Adjustments
• 4.1.3.5. USART Overview
  • 4.1.3.5.1. Introduction
  • 4.1.3.5.2. Key Configurations
  • 4.1.3.5.3. Required Registers and Settings
  • 4.1.3.5.4. Example: Setting Up USART for a Serial Monitor
• 4.1.3.6. Timers in STM32
  • 4.1.3.6.1. Key Timer Functions and Applications
  • 4.1.3.6.2. Introduction to PWM (Pulse Width Modulation)