4.1.6. Lessons by Semin Murtić

Contents:

• 4.1.6.1. V-Model
  • 4.1.6.1.1. Contents:
  • 4.1.6.1.2. Verification (Left Side of the V)
  • 4.1.6.1.3. Validation (Right Side of the V)
  • 4.1.6.1.4. Coding (Middle of the V)
  • 4.1.6.1.5. Pros of the V-Model
  • 4.1.6.1.6. Cons of the V-Model
• 4.1.6.2. STM32F411
  • 4.1.6.2.1. Features
  • 4.1.6.2.2. GPIO (General-Purpose Input/Output)
  • 4.1.6.2.3. Clock Initialization
  • 4.1.6.2.4. USART (Universal Synchronous/Asynchronous Receiver-Transmitter)
  • 4.1.6.2.5. Timer and PWM (Pulse Width Modulation)
  • 4.1.6.2.6. Overview of Register Importance
• 4.1.6.3. GPIO
  • 4.1.6.3.1. General-Purpose I/O (GPIO) Port Registers
  • 4.1.6.3.2. Configuration Registers
  • 4.1.6.3.3. Data Registers
  • 4.1.6.3.4. Set/Reset Register
  • 4.1.6.3.5. Lock Register
  • 4.1.6.3.6. Alternate Function Selection Registers
• 4.1.6.4. Clock
  • 4.1.6.4.1. Overview
  • 4.1.6.4.2. High-Speed Clock Sources
  • 4.1.6.4.3. Low-Speed Clock Sources
  • 4.1.6.4.4. RCC (Reset and Clock Control) Register
  • 4.1.6.4.5. RCC_PLLCFGR (PLL Configuration Register)
  • 4.1.6.4.6. RCC Clock Configuration Register (RCC_CFGR)
  • 4.1.6.4.7. SystemCoreClockUpdate()
  • 4.1.6.4.8. Steps to Configure Clock for 100 MHz Output from 25 MHz Input
• 4.1.6.5. USART
  • 4.1.6.5.1. Overview
  • 4.1.6.5.2. USART – Functional Description
  • 4.1.6.5.3. USART – Key Features
  • 4.1.6.5.4. USART Interfaces on STM32F411
  • 4.1.6.5.5. USART Modes
  • 4.1.6.5.6. USART Baud Rate
  • 4.1.6.5.7. USART Oversampling
  • 4.1.6.5.8. CR1 (Control Register 1)
  • 4.1.6.5.9. USART_CR1_OVER8 (Oversampling Mode)
  • 4.1.6.5.10. Data Reception
  • 4.1.6.5.11. Data Transmission
  • 4.1.6.5.12. USART Communication Initialization Process
  • 4.1.6.5.13. Connecting a Serial Monitor to the MCU
• 4.1.6.6. Timer
  • 4.1.6.6.1. Overview
  • 4.1.6.6.2. Timer Functionalities
  • 4.1.6.6.3. Timer Use Cases
  • 4.1.6.6.4. PWM (Pulse Width Modulation)
  • 4.1.6.6.5. Key PWM Parameters
  • 4.1.6.6.6. PWM Applications
  • 4.1.6.6.7. PWM Initialization Process
  • 4.1.6.6.8. Timer Frequency and Prescaler Calculation
  • 4.1.6.6.9. Duty Cycle Calculation
  • 4.1.6.6.10. Center-Aligned vs. Edge-Aligned Mode
  • 4.1.6.6.11. Example: Generating a 20 kHz PWM with a 25% Duty Cycle on TIM3